TTL compatible input buffers are required for many CMOS devices. In order to use such an input buffer in a variety of applications, it is desirable that the buffer be operable with different supply voltages. The use of a simple inverter circuit is not a possibility with the requirement that the input buffers be operable with different supply voltages.
Other circuits for input buffers which operate under different supply voltages are available. However, they normally require a tradeoff between speed and power consumption. Generally, the faster such a circuit operates the more power it requires. The tradeoff between speed and power consumption is worst when the buffer is operated under high voltage (e.g. 15 volts) with the input voltage swinging rather close to the desired trip voltage level. The invention described in this specification discloses a supply independent CMOS input buffer which will operate at high speed and yet requires low power.
One example of a prior art TTL compatible input buffer which is independent of supply voltage is shown in FIG. 1 attached hereto. The desired trip voltage level, which is generated by a supply independent voltage reference, is supplied to the gate of transistor M2a. This generates a corresponding current which is mirrored to transistor M1a by the current mirror M3a and M4a.
The trip voltage level is established by the voltage at the gate of transistor M2a. When the voltage supplied to the input buffer at IN is higher than the trip voltage level, node N1 will be pulled to a low voltage level. When the voltage level at IN is less than the trip voltage level, node N1 will be pulled to a high voltage level.
When the supply voltage at DVDD is at a high level (e.g. 15 volts), node N1 will pull low much faster than it will pull high. This is due to the limited current available from the current mirror M3a and M4a.
The delay in pulling node N1 to a high level can be decreased by increasing the current flow through current mirror M3a and M4a. However, increasing the current flow through the current mirror also increases the power consumption of the input buffer. Furthermore, when the input voltage is high, the quiescent current through the buffer is given by the current mirrored by M3a and M4a which results in high power dissipation when the input buffer is in a quiescent state.